Product Support
Synchronous Sampling
Synchronous sampling is supported only on Silicon Explorer I. Silicon Explorer II does not support
synchronous sampling. Synchronous sampling uses a sample clock that is external to the logic analyzer -
usually the clock from the system under test. This mode of operation is often referred to as State acquisition
since the analyzer is capturing the state of all signals on every clock. The target clock must be connected to
the wire labeled CLKIN. The clock ground wire must be connected for best signal integrity at high clock
rates ( > 20MHz ). The Silicon Explorer does not require the clock to be an oscillator. However, it does
require a continuous series of edges for operation.
State Display is a tabular display of logic activity, usually captured synchronously to an external clock. The
data displayed on each horizontal line represents one recorded sample. The analyzer can display the
recorded data in a variety of radixes (numerical formats) including binary, decimal, hexadecimal, analog, etc.
Clock Qualifier
State#
Signal Names
Acquired Data
The Clock Qualifer is an external signal that acts as a gate for the acquisition clock. When the external
signal is false, the acquisition clock is not allowed to load acquired data into acquisition memory.
The Clock Qualifier is useful when you want to observe signal activity taking place only when a particular
chip is selected. For example, if the system under test has three devices of the same type connected to a
common bus, one of which appears to be defective, you might want to record signal activity on the bus only
when the suspect device is selected.
If the logic analyzer's Clock Qualifier input were connected to the chip select line of the device we were
interested in, the analyzer would record data only when the chip's select line was active. The Clock Qualifier
allows us to filter out irrelevant data by only clocking data of interest into the sample buffer.
To set up for Synchronous acquisition:
34
1.
2.
Connect the clock leads of the Target Cable Assembly to the target circuit clock signal.
From the Instrument menu, choose Clock > Clock Edge and click either Rising or Falling
depending on which edge is appropriate.
Silicon Explorer II User's Guide
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